Siemens Pushes 3D Packaging to the Forefront

Siemens unveils 3D packaging tools that slash design risks and deliver faster, more reliable chiplet integration.

27 Jun 2025

Siemens has unveiled two software tools to help chipmakers manage the growing complexity of three-dimensional chip packaging, as the industry moves beyond the limits of traditional transistor scaling.

At the Design Automation Conference in San Francisco in June, the company introduced Innovator 3D IC and Calibre 3DStress. The tools are designed to detect and mitigate risks such as thermal stress, warpage and electrical failure, which can arise when multiple smaller chips are combined into a single processor system.

The shift reflects a wider transition in semiconductors. With transistor miniaturisation slowing, manufacturers have turned to advanced packaging, assembling several “chiplets” in one package, to achieve further performance gains. But the approach has introduced new design risks that can extend development cycles and raise costs.

“By delivering a stress-aware multiphysics analysis solution powered by Calibre 3DStress and driven by the Innovator 3D IC solution suite, Siemens enables customers to overcome the complexities and risks associated with 3D IC designs,” said Mike Ellow, chief executive of Siemens EDA. He added the tools would help customers meet demanding design timelines by “effectively eliminating the barriers of design complexity that traditionally impact design cycles.”

Industry partners have endorsed the approach. Bryan Black, chief executive of Chipletz, said the Innovator 3D IC suite was “critical” to enabling high-performance solutions for artificial intelligence and data centre workloads. Sandro Dalle Feste, a senior director at STMicroelectronics, said the use of Calibre 3DStress allowed the company to model early-stage failures within 3D packages, improving reliability and reducing time to market.

Demand for advanced computing in artificial intelligence, cloud infrastructure and defence is fuelling interest in chiplet designs. Siemens is positioning its tools as a way to simplify integration, reduce production risks and strengthen supply chains amid intensifying global competition.

Adoption challenges remain, particularly in integrating new software into established design flows. But with packaging now central to semiconductor strategy, Siemens’ offerings highlight the growing role of design automation in defining the next stage of processor development.